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abaco systems CEI-820 Recording Equipment Manuals
Manuals and User Guides for abaco systems CEI-820 Recording Equipment. We have
1
abaco systems CEI-820 Recording Equipment manual available for free PDF download: User Manual
abaco systems
CEI-100 Series
User Manual
abaco systems CEI-820 User Manual (191 pages)
Brand:
abaco systems
| Category:
Recording Equipment
| Size: 2.25 MB
Table of Contents
Table of Contents
4
Chapter 1 Introduction
13
Features
13
Introduction
13
Hardware Specifications
14
Table 1. Hardware Specifications
14
Chapter 2 Installation
16
Installation
16
Installing the Board
16
Overview
16
Setting the ISA Bus Base Address
17
ARINC 429 Slew Rate Configuration for CEI-100/CEI-200
18
Configuring the CEI-820TX
18
CEI-820TX Input/Output Connector Pin out
18
Figure 1. 68-Pin Receptacle Connector (SCSI-3 Compatible, View Facing Receptacles)
18
Table 2. CEI-820TX Connector Definitions (P1 and P14)
19
Configuring the CEI-820
20
CEI-820 Outline Drawing
20
CEI-820 Input/Output Connector Pin out
20
Figure 2. CEI-820 Outline Drawing
20
Figure 3. 50-Pin P1 Connector (AMP Champ 0.8 MM Receptacle Connectors - AMP Part Number 787096-1)
20
Table 3. CEI-820-XX and CEI-820-Xxj Connector Definitions (P1 and P14)
20
Table 4. CEI-820-44L Connector Definitions (P1 and P14)
22
CEI-820 Transition Cable Pin out
23
Table 5. Mating Connector for P1
23
Table 6. CEI-820 Transition Cable Pin out
23
Configuring the CEI-620
24
CEI-620 Outline Drawing
24
CEI-620 Input/Output Connector Pin out
24
Figure 4. CEI-620 Outline Drawing
24
Table 7. CEI-620 Rear Panel Input/Output Connector Definition
24
Figure 5. 50-Pin Connector (AMP Champ 0.8 MM Receptacle Connectors - AMP Part Number 787096-1)
25
Table 8. Front View - ARINC 429 Input/Output Connector (P1 and P2)
26
CEI-620 Transition Cable Pin out
27
Table 9. Mating Connectors for P1 and P2
27
Table 10. CEI-620 Transition Cable Pin out
27
Configuring the CEI-520 and CEI-520A
29
CEI-520/520A Outline Drawing
29
CEI-520/520A Input/Output Connector Pin out
29
Figure 6. CEI-520/520A Outline Drawing
29
Figure 7. 68-Pin Receptacle Connector (SCSI-3 Compatible with Rails and Latch Blocks, View Facing Receptacles)
29
Table 11. Front View - Standard CEI-520/520A ARINC 429 I/O Connector (P2)
30
Table 12. Front View - CEI-520-1208-C/CEI-520A-1208-C I/O Connector (P2)
30
Table 13. Front View - CEI-520-XXXX-J/CEI-520A-XXXX-J I/O Connector (P2)
31
Figure 8. 50-Pin IDC-Style Discrete I/O Connector (3M Part Number 2550-6002-UB)
32
Table 14. CEI-520/520A P2 Mating Connector
32
Table 15. Top View - Discrete Input/Output Connector (P3)
32
CEI-520/520A Transition Cable Pin out
33
Figure 9. 68-Pin Connector for the CEI-520/520A Transition Cable
33
Table 16. CEI-520/520A P3 Mating Connector
33
Configuring the CEI-220
34
CEI-220 Outline Drawing
34
CEI-220 Base Memory Address
34
Figure 10. CEI-220 Outline Drawing
34
Table 17. Mapping of Switch Positions to Address Bits
34
CEI-220 Interrupts and Slew Rate
35
CEI-220 ARINC Connector Pin out
35
Figure 11. CEI-220 P3 Connector Pinout
36
Table 18. CEI-220 P3 Connector Change for ARINC 6-Wire Configurations
36
Configuring the CEI-420 and CEI-420A
37
CEI-420/420A Outline Drawing
37
Figure 12. CEI-220 P4 Connector Pinout
37
Figure 13. CEI-420/420A Outline Drawing
37
CEI-420/420A Base Memory Address
38
CEI-420/420A Interrupts and Slew Rate
38
CEI-420/420A Power
38
Table 19. Mapping of Switch Positions to Address Bits
38
CEI-420/420A ARINC Connector Pin out
39
Table 20. CEI-420/420A P3 Front View
39
Figure 14. CEI-420/420A P4 Front View
40
Table 21. CEI-420/420A P3 Pin Connections
40
Table 22. CEI-420/420A P4 Pin Connections
40
Configuring the CEI-200
41
CEI-200 Outline Drawing
41
CEI-200 Base Memory Address
41
Figure 15. CEI-200 Outline Drawing
41
Table 23. CEI-200 Mapping of Switch Positions to Address Bits
41
CEI-200 Base I/O Address
42
CEI-200 Interrupts and Slew Rate
42
Table 24. Default Address of 380 (Hex) Example
42
Table 25. Jumper Blocks J2 and J3
42
CEI-200 ARINC Connector Pin out
43
Figure 16. CEI-200 I/O Connector - Front View
43
Table 26. Jumper Block J4
43
Table 27. CEI-200 I/O Connector Pin Assignments
43
Configuring the CEI-100
44
CEI-100 Outline Drawing
44
CEI-100 Base Memory Address
44
Figure 17. CEI-100 Outline Drawing
44
Table 28. Default Address of CC00 Example
44
CEI-100 Base I/O Address
45
CEI-100 Interrupts and Slew Rate
45
Table 29. Default Address of 380 (Hex) Example
45
Table 30. Jumper Block JP1
45
CEI-100 ARINC Connector Pin out
46
Figure 18. CEI-100 I/O Connector - Front View
46
Table 31. CEI-100 I/O Connector Pin Assignments
46
CEI-100/CEI-200 Self-Test
47
CEI-100/CEI-200 Software Installation
47
CEI-X20 Software Installation
48
CEI-220 Discrete Inputs
49
CEI-220/420/420A/520/520A/620/820/820TX Self-Test
49
Figure 19. CEI-220 Discrete Inputs Circuit
49
Table 32. Typical Discrete Input Application
50
Table 33. CEI-220 Discrete Input Operating Modes Specification
50
CEI-420/420A/520/520A/620/820 Discrete Inputs
51
Figure 20. CEI-420/420A/520/520A/620/820 Discrete Input Circuit
51
Table 34. Programming Examples
51
Table 35. Read Discrete Input (AR_GET_CONFIG) Format
51
CEI-220/420/420A/520/520A/620/820 Discrete Outputs
52
Figure 21. CEI-220/420/420A/520/520A/620/820 Discrete Outputs
52
Table 36. Discrete Input Operating Modes Specifications
52
Table 37. Discrete Output Specifications
53
Chapter 3 CEI-100/200 ARINC Test Program
54
General Information
54
Accessing the Program
55
Figure 22. Welcome Screen
55
Example 1
56
Example 2
56
Hot Keys
56
Figure 23. Main Menu
57
Main Menu
57
Figure 24. Setup Menu
58
Board Setup
59
Figure 25. Board Setup Menu
59
Setup Menu
58
Figure 26. Self-Test
60
Figure 27. Transmit Menu
60
Defining a Message
61
Figure 28. Transmit Message Definition Form
61
Transmitting a Message
62
Transmit Menu
60
Figure 29. Screen During Transmission
62
Receive Menu
62
Figure 30. Receive Menu
63
Figure 31. Trigger Bit Definition
64
Triggering
64
Receiving Messages
65
Chapter 4 Bustools/Arinc Data Bus Analyzer
66
Bustools/Arinc Demo Software
66
General Information
66
Chapter 5 Program Interface Library
67
Table 38. CEI-200 Buffer Size Table
67
Table 39. CEI-X20 Family Features
68
DOS Programming
69
Windows, Vxworks, and Linux Programming
69
CEI-100/200 Programming
69
CEI-X20 Programming
70
Programming the ARINC Interface
71
ARINC 429 Data Format
72
Label Formatting
72
Transmission Order
72
ARINC Parity
73
CEI-X20 Interrupt Support
73
Receiver 'Await Data' Mode
73
Utility Routines - Summary
74
Utility Routines - by Function
77
Board and API Initialization
77
Board and API Information
77
Error Reporting
78
Tick-Timer and Time Tag Functions
78
Channel Parameter Definition/Setup
78
Channel Parameter Read-Back
79
Mode Control
79
Channel Data Read Functions
79
Channel Data Write Functions
80
Label Filtering Functions
80
Data Structure Initialization Functions
80
Hardware Interrupt Control
80
Miscellaneous Functions
81
Board and Application Shutdown
81
Ar _Cancel_Data_Wait
82
Ar _Close
83
Ar_Clr_Rx_Count
84
Ar_Define_Msg
85
Ar_Execute_Bit
87
Supported Built-In Tests
87
Ar_Get_Boardname
89
Ar_Get_Boardtype
90
Ar_Get_Config
91
CEI-X20 Parameters
92
CEI-100/200 Items
94
CEI-X20 Items
95
Ar_Get_Error
97
Ar_Get_Label_Filter
98
Ar_Get_Latest
99
Ar_Get_Raw_Mode
101
Ar_Get_Rx_Count
102
Ar_Get_Timercnt
103
Ar_Get_Timercntl
104
Ar_Getblock
105
Ar_Getfilter
107
Ar_Getnext
109
Ar_Getnextt
110
Ar_Getword
111
ARINC 429 Receiver Buffer Data Format
111
ARINC 573/717 Receiver Buffer Data Format
111
Table 40. ARINC 429 Receive Buffer
111
Table 41. ARINC 573/717 Receive Buffer
111
CSDB Receiver Buffer Data Format
112
Table 42. CSDB Receive Buffer
112
Ar_Getwordt
114
Ar_Go
116
Ar_Init_Dual_Port
117
Ar_Init_Slave
118
Ar_Int_Control
119
Ar_Int_Set
121
Ar_Int_Slave
122
Ar_Label_Filter
123
Ar_Loadslv
124
Ar_Modify_Msg
126
Ar_Msg_Control
128
Ar_Num_Rchans
130
Ar_Num_Xchans
131
Ar_Putblock
132
Ar_Putfilter
133
Ar_Putword
134
ARINC 429 Transmit Data Format
134
ARINC 573/717 Transmit Data Format
134
Table 43. ARINC 573/717 Transmit Buffer
134
CSDB Transmit Data Format
135
Table 44. CSDB Transmit Buffer
135
Table 45. Typical CSDB Message Lengths
135
Ar_Putword2X16
137
Ar_Recreate_Parity
138
Ar_Reformat
139
Ar_Reset
140
Ar_Reset_Int
141
Ar_Reset_Timercnt
142
Ar_Set_Config
143
CEI-100/200 Items
143
CEI-X20 Items
144
CEI-100/200/X20 Values
145
CEI-X20 Values
146
CEI-X20 Parametric Values
147
Ar_Set_Control
149
Ar_Set_Preload_Config
150
Table 46. Supported Concurrency Modes
150
Ar_Set_Raw_Mode
153
Ar_Set_Storage_Mode
154
Ar_Set_Timerrate
156
Ar_Setchparms
158
Ar_Setinterrupts
159
Ar_Sleep
160
Ar_Timetag_Control
161
Ar_Version
163
Ar_Xmit_Sync
164
Chapter 6 Vxworks Support
165
Building the CEI-X20 API
168
Building the Sample Program
169
Figure 32. Sample Application Trace
170
Chapter 7 Description of CEI-100/200 ARINC Interface
171
Overview
171
Controlling the Board
172
Initializing the Board
172
Loading the Board
172
Programming the ARINC Channel Setup
173
Table 47. Control Word Format
173
Controlling the Timers
174
Enabling Time Tags
174
Selecting the Receive Modes
174
Enabling Interrupts
175
Receiving Data
175
Filtering out Labels
177
Transmitting Data
177
Appendix A Modifying CEI-200 Base Bit Rate
179
Procedure
179
Table 48. Calculating a Clock-Scaling Factor
179
Appendix Bcei-X20 Structure Definitions
181
Structures
181
Ar_Channel_Parms
181
Appendix C Parametric Voltage Programming
186
CEI-220 DAC Definitions
186
Introduction
186
CEI-420/420A DAC Definitions
187
CEI-520/520A DAC Definitions
187
Table 49. CEI-220 DAC Register Scale Factors
187
Table 50. CEI-520/520A DAC Register Scale Factors
187
CEI-620 DAC Definitions
188
Table 51. DAC Register Functions and Scaling Factors (CEI-620)
188
Table 52. DAC Register Functions and Scaling Factors (CEI-820)
188
Appendix D Example CEI-X20 Programs
189
Introduction
189
NET Example Programs
189
Visual Basic 6 Example Program
189
Labwindows CVI Support
190
C/C++ Example Programs
190
Overview
67
Building a Vxworks Image
165
X86 PCI BIOS Configuration
167
ISA Memory Mapping
167
Overview
165
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